June 2, 2022

FPGA - plans

This will hopefully come and go as I make progress and turn plans into finished projects.

These are all projects for the EBAZ4205.

I want to write code to download a bitstream from my own "bare metal" standalone code. This involves turning a .bit file into some kind of C data structure that can be loaded into the Zynq PL. It also involves me writing my own driver for the devcfg section of the Zynq. To test this, I would like a bitstream that does something all on its own, namely blink an LED -- so as soon as the bitstream is properly loaded into the PL, I will see the LED start blinking.

The bitstream

Done

It turns out that a .bit file has some header rubbish that I have to remove to get a plain .bin file which is destined for the PL. There are utilities to do this, but not included with Vivado (or so it seems). Somebody wrote a python program that claims to do this, but I will need to test it.

After a bit of fiddling, I discover that I can just ask Vivado to generate a .bin file for me. I can right click on "Generate Bitstream" to get a menu (with one entry "Bitstream options"). Then I select that entry and there is a box I can check to say I want a .bin file. Then I exit the menu and run Generate Bitstream (which takes a while) and voila! I see the bin file under 

./ebaz_blink_2.runs/impl_1:
-rw-r--r-- 1 tom tom 2083740 Jun  2 16:16 clocks_wrapper.bin
-rw-r--r-- 1 tom tom 2083850 Jun  2 16:16 clocks_wrapper.bit
Note that it is 110 bytes smaller than the ".bit" file.

AXI projects

I want to write my own driver for the AXI gpio, then use it to blink an LED (or turn it on/off as I see fit). This should be fairly easy, and along with the PL loader above would be the next bare metal project. Done

Next I would like to work up my own custom AXI "thing" with the sole purpose of accessing the pair of LED on the ebaz. What I envision is 4 write only addresses, as follows: red-on, red-off, green-on, green-off. So, no gpio setup, just write to whichever address suits your purpose. The real goal here is learning to do the custom AXI thing, but this would also be a useful addition for the EBAZ. Done

Interesting Zynq links

A search for "Zynq logic analyzer" turned this up: And a project for the XADC:

Play with Vitis

I have it installed, but have never used it, so ...

Fiddle with the Zynq XADC

The Zynq includes a dual channel 12 bit 1 msps ADC converter called the XADC. It is "inside" the PL section of the chip, so to make much use of it you need to do some FPGA programming.

On my EBAZ 4205 cards, the pins that connect to the XADC are not exposed, making it impossible to use the XADC on these cards to read external signals. I will need to use the Zedboard or Zybo. It is still possible to play with the XADC on the EBAZ though because it is connected to internal sensors (temperature and power supply voltages).

Apparently it is possible to access the XADC as a PS peripheral.

Relevant links

I'll note that this business of using the PCAP to load the PL has a tangential issue which is partial reconfiguration of the PL. Not something I am hot to do as yet, but an interesting idea.

Booting

It would seem that booting from NAND and from SD/emmc are entirely different. Maybe, maybe not. Suprisingly, to set up a SD card to boot, you put a FAT filesystem on it, place a file BOOT.BIN in there, and as long as BOOT.BIN has the proper contents, you are good to go.

Version control

This goes hand in hand with understanding the file layout produced by a Vivado project.
Feedback? Questions? Drop me a line!

Tom's Computer Info / [email protected]